Clarycon News Archive: STM
STM announces that Crolles2 would complete the development of 45-nm CMOS process technology during 2007 but there would then be a "discontinuation" in the role of the Crolles development center and pilot fab.
STM and LETI report at the IEDM conference a double gate device based on their SON (Silicon On Nothing) process. Source: IEDM
STMicroelectronics discloses that it plans to deploy 193- and 157-nm technology in its production fabs. The company is also experimenting with direct-write, electron-beam technology for small-lot chip production at the 65-nm node and beyond. Source: Silicon Strategies